The present invention relates generally to semiconductor integrated circuit (IC) designs, and more particularly to designs of multi-terminal capacitors.
Active devices, such as bipolar transistors and field effect transistors, and passive devices, such as resistors, capacitors, and inductors, are often utilized in ICs. Circuits that contain multi-phase signals or circuits that need matching networks for differential inputs or outputs require a rather complicated capacitor network to achieve their intended functions. Conventionally, such capacitor network is configured by connecting a number of two-terminal capacitors according to the specification requirements. For example, a number of two-terminal capacitors may be connected in a serial or parallel fashion in order to provide those circuits with a multiple terminal capacitor network with certain electrical characteristics.
Conventionally, a capacitor typically occupies its own space that cannot be used by another capacitor in an IC chip. This results in an inefficient use of space. As the demand for advanced technologies continues to grow, the need to pack more electronic devices into a small area of semiconductor substrate increases. As such, desirable in the art of IC designs are more space-efficient capacitors that can satisfy various design requirements for multiple terminal capacitor networks.